| 摘要 |
PROBLEM TO BE SOLVED: To provide a logic verification device for reducing omissions of logic verification results. SOLUTION: The logic verification device 10 includes: an inputting part 11 for receiving a first assertion 92 including a first assumption description of a plan settling operation of a verification object circuit and a first specification description of the plan settling operation based on the first assumption, and a first test pattern for verifying the plan settling operation of the verification object circuit; an extracting part 12 for extracting a determining rule assertion showing a determination condition of the value of a signal of the verification object circuit and a holding rule assertion showing a holding condition of the value of the signal of the verification object circuit by analyzing the first assertion 92; a table generating part 13 for showing a relation between the determination condition and the signal of the verification object circuit on the basis of the extracted determining rule assertion and holding rule assertion; and a verification information generating part 14 for generating verification information for verifying a non-plan settling operation of the verification object circuit that is not included in the first assertion 92 and the first test pattern on the basis of the relation. COPYRIGHT: (C)2011,JPO&INPIT
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