BOTTOM ELECTRODES FOR USE WITH METAL OXIDE RESISTIVITY SWITCHING LAYERS

摘要

A MIM stack (200a) is provided that includes (1) a first conductive layer (108) comprising a first metal - silicide layer (108a) and a second metal - silicide layer (108b); (2) a resistivity- switching layer (104) comprising a metal oxide layer formed above the first conductive layer; and (3) a second conductive layer (106) formed above the resistivity- switching layer. A memory cell may be formed from the MIM stack. Numerous other aspects are provided.