| 摘要 |
A selector circuit for selecting and outputting plural pieces of output data from input data including plural bits, in which each of the pieces of the output data including plural bits is provided. The selector circuit includes plural first swap circuits, each of the bits of the input data being input to any of the plural first swap circuits, the plural first swap circuits being configured to reorder and output the input bits or output the input bits without reordering; a bus configured to transfer the bits output from the first swap circuits; and plural data field specifying circuits respectively configured to select and take out a predetermined number of continuous bits on the bus. Plural bits taken out by any of the data field specifying circuits are included in the respective pieces of the output data.
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