发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT CAPABLE OF EVALUATING THE CHARACTERISTICS OF A TRANSISTOR
摘要 According to one embodiment, a test circuit comprises a function block, a test circuit, and a signal generation circuit. The test circuit is arranged in an area close to the function block having a plurality of transistors. The test circuit comprises a first flip-flop circuit, a second flip-flop circuit, and a logic circuit connected between the output of the first flip-flop circuit and the input of the second flip-flop circuit. The signal generation circuit generates clock pulses including a first clock pulse and a second clock pulse. The signal generation circuit is capable of controlling a pulse interval between the first clock pulse and the second clock pulse. In a test, the first flip-flop circuit outputs data in synchronization with the first clock pulse of the signal generation circuit and the second flip-flop circuit latches data in synchronization with the second clock pulse of the signal generation circuit.
申请公布号 US2011227609(A1) 申请公布日期 2011.09.22
申请号 US201113050078 申请日期 2011.03.17
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KUSHIYAMA NATSUKI
分类号 H03K5/00;H03L7/00 主分类号 H03K5/00
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