发明名称 |
HIERARCHICAL MULTI-CORE PROCESSOR, MULTI-CORE PROCESSOR SYSTEM, AND CONTROL PROGRAM |
摘要 |
<p>In a multi-core processor system (100), processing related to protocols of the session layer of the OSI reference model is executed by the CPU group for z=0, processing related to protocols of the presentation layer is executed by the CPU group for z=1, and processing related to protocols of the application layer is executed by the CPU group for z=2. The CPU group for z=0 is connected to the CPU group for z=1 via local memory (201), the CPU group for z=1 is connected to the CPU group for z=2 via local memory (202), and the CPU group for z=2 is connected to the main CPU (101) via local memory (203). Packets are passed in hierarchical order of the OSI reference model, and therefore, the CPU group for z=0 is not directly connected to the CPU group for z=2, but is connected only via the CPU group for z=1.</p> |
申请公布号 |
WO2011114477(A1) |
申请公布日期 |
2011.09.22 |
申请号 |
WO2010JP54607 |
申请日期 |
2010.03.17 |
申请人 |
FUJITSU LIMITED;YAMASHITA, KOICHIRO;YAMAUCHI, HIROMASA;MIYAZAKI, KIYOSHI;SUZUKI, TAKAHISA;KURIHARA, KOJI |
发明人 |
YAMASHITA, KOICHIRO;YAMAUCHI, HIROMASA;MIYAZAKI, KIYOSHI;SUZUKI, TAKAHISA;KURIHARA, KOJI |
分类号 |
G06F13/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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