SEMICONDUCTOR DEVICE, AND TEST METHOD FOR SAME

摘要

As it has previously been difficult to carry out tests or analysis on combinational circuits implemented across a plurality of chips, in the disclosed device a flip-flop (31b) is provided which, depending on the presence or absence of lamination, forms either a scan-chain within a semiconductor chip (LSI_B), or a scan chain which spans a plurality of semiconductor chips (LSI_A and LSI_B).