发明名称 Reading method for MLC memory and reading circuit using the same
摘要 A reading method for a multi-level cell (MLC) memory includes the following steps. A number of word line voltages are sequentially provided to an MLC memory cell. A number of bit line voltages corresponding to the word line voltages are sequentially provided to the MLC memory cell. One of the word line voltages is higher than another one of the word line voltages, and one of the bit line voltages corresponding to the one of the word line voltages is lower than another one of the bit line voltages corresponding to the another one of the word line voltages.
申请公布号 US8023333(B2) 申请公布日期 2011.09.20
申请号 US20100855799 申请日期 2010.08.13
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 HO HSIN-YI;HUNG JI-YU
分类号 G11C16/06;G11C16/04 主分类号 G11C16/06
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