发明名称 Wafer and manufacturing method of electronic component
摘要 The present invention relates to a wafer formed with an evaluation element and capable of improving productivity and a manufacturing method of an electronic component using the same. In a wafer according to the present invention, a plurality of elements connected to electrode films through lead-out conductive films are arranged and a chip area is defined for cutting out the plurality of elements in a given number. In the wafer, at least one evaluation element is formed in an area outside the chip area. The lead-out conductive films extend to the outside area and are connected to the evaluation elements. With this wafer, since the lead-out conductor is shared between the element and the evaluation element, the electrode film connected therewith can be shared, too. Accordingly, evaluation can be performed by using the evaluation element without the need of providing the wafer with a lead-out conductor and an electrode film exclusively for the evaluation element, so that the chip area to be cut out from the wafer can be made larger than before.
申请公布号 US8021712(B2) 申请公布日期 2011.09.20
申请号 US20090406445 申请日期 2009.03.18
申请人 TDK CORPORATION 发明人 NAKAZAWA OSAMU;HACHISUKA NOZOMU;HIRAKI TETSUYA
分类号 H05K3/02;H01L21/301;H05K3/30 主分类号 H05K3/02
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