发明名称 Method of Forming a DRAM Array of Devices with Vertically Integrated Recessed Access Device and Digitline
摘要 A method is disclosed for forming a memory device having buried access lines (e.g., wordlines) and buried data/sense lines (e.g., digitlines) disposed below vertical cell contacts. The buried wordlines may be formed trenches in a substrate extending in a first direction, and the buried digitlines may be formed from trenches in a substrate extending in a second direction perpendicular to the first direction. The buried digitlines may be coupled to a silicon sidewall by a digitline contact disposed between the digitlines and the silicon substrate.
申请公布号 US2011220994(A1) 申请公布日期 2011.09.15
申请号 US20100721373 申请日期 2010.03.10
申请人 MICRON TECHNOLOGY, INC. 发明人 PAREKH KUNAL;ROBERTS CEREDIG;TRAN THY;JOZWIAK JIM;HWANG DAVID
分类号 H01L29/78;H01L21/28 主分类号 H01L29/78
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