发明名称 METHOD OF FABRICATING SEMICONDUCTOR DEVICE HAVING DUAL GATE
摘要 A method of fabricating a semiconductor device having a dual gate allows for the gates to have a wide variety of threshold voltages. The method includes forming a gate insulation layer, a first capping layer, and a barrier layer in the foregoing sequence across a first region and a second region on a substrate, exposing the gate insulation layer on the first region by removing the first capping layer and the barrier layer from the first region, forming a second capping layer on the gate insulation layer in the first region and on the barrier layer in the second region, and thermally processing the substrate on which the second capping layer is formed. The thermal processing causes material of the second capping layer to spread into the gate insulation layer in the first region and material of the first capping layer to spread into the gate insulation layer in the second region. Thus, devices having different threshold voltages can be formed in the first and second regions.
申请公布号 US2011223758(A1) 申请公布日期 2011.09.15
申请号 US201113116045 申请日期 2011.05.26
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 NA HOON-JOO;SHIN YU-GYUN;PARK HONG-BAE;CHO HAG-JU;HONG SUG-HUN;HYUN SANG-JIN;HONG HYUNG-SEOK
分类号 H01L21/336 主分类号 H01L21/336
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