发明名称 SHIELDED GATE TRENCH MOS WITH IMPROVED SOURCE PICKUP LAYOUT
摘要 A method for fabricating a semiconductor device includes forming a plurality of trenches using a first mask. The trenches include source pickup trenches located in outside a termination area and between two adjacent active areas. First and second conductive regions separated by an intermediate dielectric region are formed using a second mask. A first electrical contact to the first conductive region and a second electrical contact to the second conductive region are formed using a third mask and forming a source metal region. Contacts to a gate metal region are formed using a fourth mask. A semiconductor device includes a source pickup contact located outside a termination region and outside an active region of the device.
申请公布号 US2011220990(A1) 申请公布日期 2011.09.15
申请号 US20100722384 申请日期 2010.03.11
申请人 ALPHA AND OMEGA SEMICONDUCTOR INCORPORATED 发明人 CHANG HONG;SU YI;LI WENJUN;WENG LIMIN;CHEN GARY;KIM JONGOH;CHEN JOHN
分类号 H01L29/78;H01L21/28;H01L21/336 主分类号 H01L29/78
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