发明名称 |
IMPROVED EDRAM ARCHITECTURE |
摘要 |
A process for manufacturing an eDRAM device (300) comprises fabricating semiconductor features (304 a-e) on a semiconductor substrate, the semiconductor substrate including a DRAM area (301) and logic area (302). The process also includes fabricating a first conductive layer (Ml) in the DRAM area and in the logic area, the first conductive layer in communication with a first group of the semiconductor features. After fabricating the first conductive layer, a storage component (312,313) is fabricated in communication with a second group of the semiconductor features within the DRAM area. |
申请公布号 |
WO2011066322(A3) |
申请公布日期 |
2011.09.15 |
申请号 |
WO2010US57888 |
申请日期 |
2010.11.23 |
申请人 |
QUALCOMM INCORPORATED;KANG, WOOTAG;WANG, ZHONGZE |
发明人 |
KANG, WOOTAG;WANG, ZHONGZE |
分类号 |
H01L21/8242;H01L27/108 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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