| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory module wherein current consumption is reduced. <P>SOLUTION: The semiconductor memory module 100 includes an interface chip 110. The interface chip 110 includes a clock signal synchronization circuit (DLL (Delayed Lock Loop)) thereinside, and generates a control signal synchronized with an external clock Clock input from the outside. The interface chip 110 reduces a frequency of the control signal, and supplies a clock to semiconductor memories 101-108 through a signal line 121. The semiconductor memories 101-108 each take in a command address signal synchronized with the supplied clock from the interface chip 110, and each perform operation corresponding to a command. The semiconductor memories 101-108 each perform data input/output with the interface chip 110 in read/write operation. The interface chip 110 converts a bit width and performs input/output of data from/to the outside. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
