发明名称 |
Methods and Circuits for Asymmetric Distribution of Channel Equalization Between Devices |
摘要 |
A transceiver architecture supports high-speed communication over a signal lane that extends between a high-performance integrated circuit (IC) and one or more relatively low-performance ICs employing less sophisticated transmitters and receivers. The architecture compensates for performance asymmetry between ICs communicating over a bidirectional lane by instantiating relatively complex transmit and receive equalization circuitry on the higher-performance side of the lane. Both the transmit and receive equalization filter coefficients in the higher-performance IC may be adaptively updated based upon the signal response at the receiver of the higher-performance IC.
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申请公布号 |
US2011222594(A1) |
申请公布日期 |
2011.09.15 |
申请号 |
US201113103564 |
申请日期 |
2011.05.09 |
申请人 |
RAMBUS INC. |
发明人 |
ZERBE JARED L.;ASSADERAGHI FARIBORZ;LEIBOWITZ BRIAN S.;LEE HAE-CHANG;REN JIHONG;LIN QI |
分类号 |
H04L27/00;H04L27/01 |
主分类号 |
H04L27/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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