| 摘要 |
The present invention relates to providing a system clock signal that is based on either a first clock signal that is capable of being frequency-corrected or a second clock signal that is not capable of being frequency-corrected, depending on system needs. When the system clock signal is based on the second clock signal, all or part of the circuitry that provides the first clock signal may be disabled or powered-down to reduce power consumption. A multiplexer may be used to select either the first or the second clock signal to provide the system clock signal to system circuitry. The system circuitry may be intolerant of phase-jumps in the system clock signal; therefore, before the multiplexer transitions between the first and the second clock signals, the first clock signal may be phase-adjusted to bring it into phase-alignment with the second clock signal.
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