发明名称 |
Method to control source/drain stressor profiles for stress engineering |
摘要 |
A strained channel transistor structure and methods of forming a semiconductor device are presented. The transistor structure includes a strained channel region having a first semiconductor material with a first natural lattice constant. A gate dielectric layer overlying the strained channel region, a gate electrode overlying the gate dielectric layer and a source region and drain region oppositely adjacent to the strained channel region are provided. One or both of the source region and drain region include a stressor region having a second semiconductor material with a second natural lattice constant different from the first natural lattice constant. The stressor region has graded concentration of a dopant impurity and/or of a stress inducing molecule.
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申请公布号 |
US8017487(B2) |
申请公布日期 |
2011.09.13 |
申请号 |
US20060399016 |
申请日期 |
2006.04.05 |
申请人 |
GLOBALFOUNDRIES SINGAPORE PTE. LTD.;INTERNATIONAL BUSINESS MACHINES CORPORATION (IBM) |
发明人 |
CHONG YUNG FU;LUO ZHIJIONG;HOLT JUDSON ROBERT |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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