发明名称 Structure and method of latchup robustness with placement of through wafer via within CMOS circuitry
摘要 A method of manufacturing a semiconductor structure includes: forming a trench in a back side of a substrate; depositing a dopant on surfaces of the trench; forming a shallow trench isolation (STI) structure in a top side of the substrate opposite the trench; forming a deep well in the substrate; out-diffusing the dopant into the deep well and the substrate; forming an N-well and a P-well in the substrate; and filling the trench with a conductive material.
申请公布号 US8017471(B2) 申请公布日期 2011.09.13
申请号 US20080186802 申请日期 2008.08.06
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHAPMAN PHILLIP F.;COLLINS DAVID S.;VOLDMAN STEVEN H.
分类号 H01L21/8238 主分类号 H01L21/8238
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