发明名称 Efficient implementation of branch intensive algorithms in VLIW and superscalar processors
摘要 An apparatus for implementing branch intensive algorithms is disclosed. The apparatus includes a processor containing a plurality of ALUs and a plurality of result registers. Each result register has a guard input which allows the ALU to write a result to the register upon receipt of a selection signal at the guard input. A lookup table is dynamically programmed with logic to implement an upcoming branching portion of program code. Upon evaluation of the branch conditions of the branching portion of code, the lookup table outputs a selection signal for writing the correct results of the branching portion of code based on the evaluation of the branch condition statements and the truth table programmed into the lookup table to the result register.
申请公布号 US8019979(B2) 申请公布日期 2011.09.13
申请号 US20070854003 申请日期 2007.09.12
申请人 SIGMA DESIGNS, INC. 发明人 CALDER JEFFREY W.;SUN TONG
分类号 G06F9/34;G06F9/40 主分类号 G06F9/34
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