发明名称 Memory module including voltage sense monitoring interface
摘要 Memory devices and systems include a voltage sense line for addressing voltage tolerances across variable loadings. The memory devices and systems comprise a memory module connector with a first plurality of pins coupled to circuitry on a memory module, and a second plurality of pins coupled to power rails on the memory module that enable monitoring of the power rails from external to the memory module.
申请公布号 US8018753(B2) 申请公布日期 2011.09.13
申请号 US20080262038 申请日期 2008.10.30
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P. 发明人 CARR DENNIS;CALHOUN MICHAEL BOZICH;LEE TEDDY;WARNES LIDIA;VU DAN
分类号 G11C5/06 主分类号 G11C5/06
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