| 摘要 |
PROBLEM TO BE SOLVED: To improve error resilience in data such as LDPC code. SOLUTION: In LDPC code of 4,320 bits, 4- or 6-bits are defined as one symbol. When they are mapped on 2<SP>4</SP>or 2<SP>6</SP>signal points, a column twist interleaver 24 performs column twist interleaving to change a start position when code bits are written in the column direction of memory, for each of the memory columns, as an operation of rearranging the bits of the LDPC code so that a plurality of code bits corresponding to one in arbitrary one row of the parity check matrix of the LDPC code are not included in one symbol. The present invention can be applied, for example, when the LDPC code is transmitted. COPYRIGHT: (C)2011,JPO&INPIT
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