发明名称 Dummy Wafers in 3DIC Package Assemblies
摘要 A package structure includes a first die, and a second die over and bonded to the first die. The second die has a size smaller than a size of the first die. A dummy chip is over and bonded onto the first die. The dummy chip includes a portion encircling the second die. The dummy chip includes a material selected from the group consisting essentially of silicon and a metal.
申请公布号 US2011215470(A1) 申请公布日期 2011.09.08
申请号 US20100717779 申请日期 2010.03.04
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHEN MING-FA;LEE CHIA-YEN
分类号 H01L23/52 主分类号 H01L23/52
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