发明名称 Multi-bank memory with interleaved or parallel accesses of banks
摘要 <p>A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. The memory device has a mode of operation in which a first column access request is directed to a first open row in a first one of the storage banks and a third column access request is directed to a second open row in a second one of the storage banks, the receipt of the third column access request can correctly occur before the minimum access time interval has elapsed since the receipt of the first column access request.</p>
申请公布号 EP2363859(A2) 申请公布日期 2011.09.07
申请号 EP20110168735 申请日期 2005.11.23
申请人 RAMBUS INC. 发明人 WARE, FREDERICK;HAMPEL, CRAIG, E.;RICHARDSON, WAYNE, S.;BELLOWS, CHAD, A.;LAI, LAWRENCE
分类号 G11C7/10;G11C7/22;G11C11/4076;G11C11/4097 主分类号 G11C7/10
代理机构 代理人
主权项
地址