发明名称 |
Receiver employing selectable A/D sample clock frequency |
摘要 |
A receiver is set forth that includes a tuner circuit and a converter circuit. The tuner circuit provides an analog signal corresponding to a modulated signal that is received on a selected channel. The converter circuit includes a sample clock that is used to convert the analog signal to a digital signal at a conversion rate corresponding to the frequency of the sample clock. The sample clock is selectable between at least two different clock frequencies.
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申请公布号 |
US8014477(B1) |
申请公布日期 |
2011.09.06 |
申请号 |
US20060592357 |
申请日期 |
2006.11.02 |
申请人 |
MARVELL INTERNATIONAL LTD. |
发明人 |
TSAI KING CHUN;CLEMENT PATRICK;COUSINARD DAVID |
分类号 |
H03D1/04 |
主分类号 |
H03D1/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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