发明名称 |
Integrated circuit including a stressed dielectric layer with stable stress |
摘要 |
A method for fabricating an integrated circuit is provided. The method includes providing a substrate having an active region and an opening in the substrate adjacent to the active region. The opening is filled with a dielectric material so as to provide an isolation region in the substrate. A transistor is also formed in the active region and a pre-metal dielectric layer formed over the substrate and transistor. At least one of the dielectric layer in isolation region or the pre-metal dielectric layer includes a stressed O3 TEOS oxide having a stress retaining dopant, wherein the concentration of the stress retaining dopant is sufficient to retard stress degradation of the O3 TEOS oxide.
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申请公布号 |
US8013372(B2) |
申请公布日期 |
2011.09.06 |
申请号 |
US20080062535 |
申请日期 |
2008.04.04 |
申请人 |
GLOBALFOUNDRIES SINGAPORE PTE. LTD. |
发明人 |
LIU HUANG;SHU JEFF;GOH LUONA;LU WEI |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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