发明名称 MULTILEVEL DRAM
摘要 <p>A multi-level dynamic random-access memory (MLDRAM) represents an original bit combination of more than one bit using a cell voltage stored in a single memory cell. The cell voltage is in one of a number of discrete analog voltage ranges each corresponding to a respective one of the possible values of the bit combination. In reading a selected memory cell, stored charge is conveyed via a local bitline to a preamplifier. The preamplifier amplifies the signal on the local bitline and drives a global bitline with an analog signal representative of the stored voltage. A digitizer converts the analog signal on the global bitline into a read bit combination. The read bit combination is then moved to a data cache over the global bitline. The data cache writes an analog voltage back to the memory cell to write a new value or restore data destroyed in reading the cell.</p>
申请公布号 WO2011106054(A1) 申请公布日期 2011.09.01
申请号 WO2010US58533 申请日期 2010.12.01
申请人 RAMBUS INC.;KOYA, YOSHIHITO;HAUKNESS, BRENT 发明人 KOYA, YOSHIHITO;HAUKNESS, BRENT
分类号 G11C11/4074;G11C11/4091;G11C11/4094 主分类号 G11C11/4074
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