发明名称 |
METHOD OF FABRICATING TRANSISTOR |
摘要 |
A method of fabricating a transistor is provided. The transistor includes a SiGe epitaxial layer formed in a recess region of a substrate at both side of a gate electrode and a SiGe capping layer formed on the SiGe epitaxial layer. The transistor further includes a SiGe seed layer formed under the SiGe epitaxial layer and a silicon capping layer formed on the SiGe capping layer.
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申请公布号 |
US2011212604(A1) |
申请公布日期 |
2011.09.01 |
申请号 |
US201113107789 |
申请日期 |
2011.05.13 |
申请人 |
JUSUNG ENGINEERING CO., LTD. |
发明人 |
YANG CHEOL HOON;JEON YONG HAN |
分类号 |
H01L21/20 |
主分类号 |
H01L21/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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