发明名称 Fully Depleted SOI Multiple Threshold Voltage Application
摘要 An integrated circuit comprises a substrate and a buried dielectric formed in the substrate. The buried dielectric has a first thickness in a first region, a second buried dielectric thickness in a second region, and a step between the first and second regions. A semiconductor layer overlies the buried dielectric.
申请公布号 US2011212579(A1) 申请公布日期 2011.09.01
申请号 US201113100673 申请日期 2011.05.04
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHEN HAO-YU;CHANG CHANG-YUN;LEE DI-HONG;YANG FU-LIANG
分类号 H01L21/8234;H01L21/265;H01L21/28;H01L21/762;H01L21/84;H01L27/12;H01L29/786 主分类号 H01L21/8234
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