发明名称 |
PEAK POWER SUPPRESSION CIRCUIT, AND COMMUNICATION DEVICE PROVIDED WITH SAID CIRCUIT |
摘要 |
<p>Provided is a peak power suppression circuit (9) wherein it is possible to more reliably suppress the peak power of IQ-baseband signals. The peak power suppression circuit (9) performs clipping processing on IQ-baseband signals. The suppression circuit (9) is provided with a power calculating unit (13) which calculates the instantaneous power (P) of an IQ-baseband signal, a pulse retention unit (22) which retains an offset pulse (S) that contains the frequency components within the frequency band (B) of the IQ-baseband signal and outside said frequency band (B), and a clipping processing unit (17) which, in relation to the IQ-baseband signal in which the calculated instantaneous power (P) is larger than a predetermined threshold value (Pth), subtracts the offset signals (Ic, Qc) obtained by multiplying the increment (?I, ?Q) of the aforementioned IQ-baseband signal from the threshold value (Pth) with the offset pulse (S).</p> |
申请公布号 |
WO2011104951(A1) |
申请公布日期 |
2011.09.01 |
申请号 |
WO2010JP70284 |
申请日期 |
2010.11.15 |
申请人 |
SUMITOMO ELECTRIC INDUSTRIES, LTD.;MAEHATA, TAKASHI;ILLARIONOV, MIKHAIL |
发明人 |
MAEHATA, TAKASHI;ILLARIONOV, MIKHAIL |
分类号 |
H04J11/00 |
主分类号 |
H04J11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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