| 摘要 |
An adaptable, reconfigurable, multi-band SAW-less radio receiver and/or transmitter is described that can operate within the limitations of 40nm and similar low voltage CMOS technology nodes, comprising: 1) A current output node from a single LNA or a number of LNAs. In the latter case, the current output node sums all of the separate LNA outputs. 2) A shunt style of steerable frequency notch filter for attenuating interferers added to the LNA current output node. 3) An adaptable negative conductance circuit that allows the amount of interference rejection provided by the notch filter to be varied with the bias current setting and RF device size setting. 4) An adaptable negative conductance circuit that allows parasitic resistance such as that encountered in a 40nm or similar low voltage CMOS technology node to be compensated for. The level of compensation can be a function of the setting of bias current and RF device width. 5) An overdrive monitor circuit that provides a signal which indicates the distribution of the available supply voltage between devices in the negative conductance circuit. This signal in turn can be applied to a local analog loop which adjusts the bias current and RF device width within the negative conductance circuit to maximize the linearity of the notch filter for a specific level of notch filter rejection. Alternatively, this control loop can be closed through the digital baseband. 6) A shunt style of steerable frequency notch filter placed prior to the PPA (pre-power amplifier) or PPAs in a cellular transmitter for rejecting transmitter noise occurring in the corresponding receiver band and/or spurious frequency components. 7) A steerable frequency notch filter placed prior to the LO (local oscillator) input to a frequency upconverter (transmitter application) or frequency downconverter (receiver application) to attenuate out of band noise and/or spurious frequency components. |
