发明名称 Local Integration of Non-Linear Sheet in Integrated Circuit Packages for ESD/EOS Protection
摘要 A packaged semiconductor device (200) with a substrate (220) having, sandwiched in an insulator (221), a flat sheet-like sieve member (240) made of a non-linear material switching from insulator to conductor mode at a preset voltage. Both member surfaces are free of indentations; the member is perforated by through-holes, which are grouped into a first set (241) and a second set (242). Metal traces (251) over one member surface are positioned across the first set through-holes (241); each trace is connected to a terminal on the substrate top and, through the hole, to a terminal on the substrate bottom. Analogous for metal traces (252) over the opposite member surface and second set through-holes (242) . Traces (252) overlap with a portion of traces (252) to form the locations for the conductivity switches, creating local ultra-low resistance bypasses to ground for discharging overstress events (ESD,EOS).
申请公布号 EP1990834(A3) 申请公布日期 2011.08.31
申请号 EP20080100931 申请日期 2008.01.25
申请人 TEXAS INSTRUMENTS FRANCE 发明人 LEDUC, YVES;MESSINA, NATHALIE;DUWURY, CHARVAKA;WACHTLER, KURT
分类号 H01L23/62 主分类号 H01L23/62
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