发明名称 Method and apparatus for evaluating integrated circuit design performance using basic block vectors, cycles per instruction (CPI) information and microarchitecture dependent information
摘要 A test system or simulator includes an integrated circuit (IC) benchmark software program that executes workload program software on a semiconductor die IC design model. The benchmark software program includes trace, simulation point, basic block vector (BBV) generation, cycles per instruction (CPI) error, clustering and other programs. The test system also includes CPI stack program software that generates CPI stack data that includes microarchitecture dependent information for each instruction interval of workload program software. The CPI stack data may also include an overall analysis of CPI data for the entire workload program. IC designers may utilize the benchmark software and CPI stack program to develop a reduced representative workload program that includes CPI data as well as microarchitecture dependent information.
申请公布号 US8010334(B2) 申请公布日期 2011.08.30
申请号 US20080112034 申请日期 2008.04.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BELL ROBERT H;CHEN, JR. THOMAS W;INDUKURU VENKAT R;MERICAS ALEX E;SESHADRI PATTABI M;VALLURI MADHAVI G
分类号 G06F17/50 主分类号 G06F17/50
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