发明名称 Semiconductor memory structure with stress regions
摘要 A semiconductor memory structure with stress regions includes a substrate defining a first and a second device zone; a first and a second stress region formed in each of the first and second device zone to yield stress different in level; a barrier plug separating the two device zones from each other; and a plurality of oxide spacers being located between the first stress regions and the barrier plug while in direct contact with the first stress regions. Due to the stress yielded at the stress regions, increased carrier mobility and accordingly, increased reading current can be obtained, and only a relatively lower reading voltage is needed to obtain an initially required reading current. As a result, the probability of stress-induced leakage current is reduced to enhance the data retention ability.
申请公布号 US8008692(B2) 申请公布日期 2011.08.30
申请号 US20080233486 申请日期 2008.09.18
申请人 EON SILICON SOLUTION INC. 发明人 CHEN HUNG-WEI;WU YIDER
分类号 H01L29/04 主分类号 H01L29/04
代理机构 代理人
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