发明名称 |
Transistor structure having dual shield layers |
摘要 |
A semiconductor device is formed having lower gate to drain capacitance. A trench (80) is formed adjacent to a drain (20) of the semiconductor device. Trench (80) has a sidewall surface (100) and a surface (90). A doped region (110) is implanted through the sidewall surface (100) of trench (80). A dielectric layer (150) overlies the sidewall surface (100) of trench (80). A shield layer (170) overlies the dielectric layer (150). The shield layer (170) is between a portion of drain (20) and a portion of the gate and gate interconnect of the semiconductor device thereby reducing gate to drain capacitance. The shield layer (170) overlies a minority portion of the surface (90) of trench (80). A second shield layer (270) further reduces gate to drain capacitance.
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申请公布号 |
US8008719(B2) |
申请公布日期 |
2011.08.30 |
申请号 |
US20080248811 |
申请日期 |
2008.10.09 |
申请人 |
HVVI SEMICONDUCTORS, INC. |
发明人 |
DAVIES ROBERT BRUCE |
分类号 |
H01L29/78 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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