发明名称 |
Structure for automated transistor tuning in an integrated circuit design |
摘要 |
A design structure for tuning an integrated circuit design holds a reference clock signal constant across the integrated circuit design and, while the reference clock signal is held constant, optimizes transistors forming a register within the integrated circuit design and thereafter optimizes transistors forming one or more clock buffers coupled to the reference clock signal.
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申请公布号 |
US8010932(B2) |
申请公布日期 |
2011.08.30 |
申请号 |
US20080130476 |
申请日期 |
2008.05.30 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DURHAM CHRISTOPHER M.;KLIM PETER J.;KRENTLER ROBERT N. L. |
分类号 |
G06F9/455 |
主分类号 |
G06F9/455 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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