| 摘要 |
PROBLEM TO BE SOLVED: To mass-produce layered chip packages at low cost in a short time. SOLUTION: The layered chip package includes: a main body including a plurality of layer portions stacked; and wiring disposed on at least one side surface of the main body. In a method of manufacturing the layered chip package, first, a plurality of substructures each of which including an array of a plurality of preliminary layer portions are used to fabricate a layered substructure that includes a plurality of pre-separation main bodies 2P arranged in rows. Next, the layered substructure is cut into a plurality of blocks 116 each of which includes a row of a plurality of pre-separation main bodies 2P, and the wiring is collectively formed on the plurality of pre-separation main bodies 2P included in each block 116. The plurality of pre-separation main bodies 2P are then separated from each other. Each of the plurality of blocks 116 includes a row of three, four, or five pre-separation main bodies 2P. COPYRIGHT: (C)2011,JPO&INPIT
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