发明名称 |
RESTRICTING MEMORY AREAS FOR AN INSTRUCTION READ IN DEPENDENCE UPON A HARDWARE MODE AND A SECURITY FLAG |
摘要 |
<p>An apparatus for processing data (2) includes a processor (8), a memory (6) and memory control circuitry (12). The processor (8) operates in a plurality of hardware modes including a privileged mode and a user mode. When operating in the privileged mode, the processor (8) is blocked by the memory control circuitry (12) from fetching instructions from memory address regions (34, 38, 42) within the memory (6) which are writeable within the user mode if a security flag within register (46) is set to indicate that this blocking mechanism is active.</p> |
申请公布号 |
WO2011101609(A1) |
申请公布日期 |
2011.08.25 |
申请号 |
WO2010GB52105 |
申请日期 |
2010.12.16 |
申请人 |
ARM LIMITED;GRISENTHWAITE, RICHARD ROY |
发明人 |
GRISENTHWAITE, RICHARD ROY |
分类号 |
G06F12/14 |
主分类号 |
G06F12/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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