| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an error detection correction system suitable for use in a memory that requires a reduction in circuit scale. <P>SOLUTION: The error detection correction system includes: an encoding part which generates a check bit to be stored with an information bit; a syndrome calculation part which calculates a syndrome based on read data from a memory cell array; a syndrome element calculation part which performs calculation for expressing a coefficient of error search equation by a Galois field element; an error search part which solves error search equation based on a calculation result of the syndrome element calculation part to calculate an error bit position; and an error correction part. The encoding part and the syndrome calculation part share a time division decoder which repeats data input with parallel m bits for a plurality of cycles in order to perform data bit selection of check bit generation and syndrome generation, assuming that reading and writing of the memory cell array are performed with the parallel m bits and error detection correction is performed by unit of data of M bit (M is integer multiple of m). <P>COPYRIGHT: (C)2011,JPO&INPIT |
