| 摘要 |
A super-resolution processor according to the present invention includes: an N enlargement unit that generates an N-enlarged image by enlarging the input image by a factor N; an M enlargement unit that generates an M-enlarged image by enlarging the input image by a factor M; a high-pass filter unit that extracts a high-frequency component of the M-enlarged image, as an M-enlarged high-frequency image; a patch extraction unit that extracts an estimated patch of a predetermined size from the M-enlarged high-frequency image, the estimated patch being a part of the M-enlarged high-frequency image; and an addition unit that adds the estimated patch to a processing target block of the predetermined size in the N-enlarged image, to generate the output image, where M is smaller than N.
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