PULSE DYNAMIC LOGIC GATES WITH MUX-D SCAN FUNCTIONALITY
摘要
<p>A scannable pulse dynamic logic gate may include an evaluation network that evaluates dynamic inputs in response to assertion of an evaluate pulse. The evaluate pulse may be generated from a clock signal such that it is shorter in duration than the clock signal. During a normal mode of operation, when the evaluate pulse is asserted, the evaluation network may discharge a dynamic node depending on the state of the dynamic inputs. The resultant state of the dynamic node may be stored within an output storage element. When the evaluate pulse is deasserted, the dynamic node may be precharged. During a scan mode of operation, the dynamic node may remain precharged. Scan data may be transferred to the output storage element under the control of scan-related control signals.</p>
申请公布号
WO2011103099(A1)
申请公布日期
2011.08.25
申请号
WO2011US24921
申请日期
2011.02.15
申请人
APPLE INC.;SENINGEN, MICHAEL, R.;RUNAS, MICHAEL, E.