发明名称 Architecture for systolic nonlinear filter processors
摘要 Described are nonlinear filter processors having an array of polynomial nonlinear filters including a first polynomial nonlinear filter and a last polynomial nonlinear filter. The first polynomial nonlinear filter has an input terminal for receiving an input data sample. The polynomial nonlinear filters systolically pass the input data sample from the first polynomial nonlinear filter to the last polynomial nonlinear filter. Each polynomial nonlinear filter produces an output data sample based on the input data sample. In addition, each polynomial nonlinear filter other than the last polynomial nonlinear filter systolically passes the output data sample generated by that polynomial nonlinear filter to a neighboring polynomial nonlinear filter. Each polynomial nonlinear filter other than the first polynomial nonlinear filter sums a nonlinearly filtered input data sample produced by that polynomial nonlinear filter with the output data sample received from a neighboring polynomial nonlinear filter.
申请公布号 US8005176(B2) 申请公布日期 2011.08.23
申请号 US20080030913 申请日期 2008.02.14
申请人 MASSACHUSETTS INSTITUTE OF TECHNOLOGY 发明人 SONG WILLIAM S.
分类号 H04B1/10 主分类号 H04B1/10
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