发明名称 Error detection in precharged logic
摘要 An integrated circuit is provided with domino logic including a speculative node and a checker node. Precharged circuitry precharges both the speculative node and the checker node. Logic circuitry provides a discharge path for the speculative node and the checker node in dependence upon input signal values. Evaluation control circuitry first couples the speculative node to the logic circuitry and then subsequently couples the checker node to the logic circuitry such that these can be discharged if the input signals to the logic circuitry have appropriate values. Error detection circuitry detects an error when the speculative node and the checker node are not one of both discharged or both undischarged.
申请公布号 US8006147(B2) 申请公布日期 2011.08.23
申请号 US20090382427 申请日期 2009.03.16
申请人 ARM LIMITED;UNIV MICHIGAN 发明人 BULL DAVID MICHAEL;DAS SHIDHARTHA;BLAAUW DAVID THEODORE
分类号 G11C29/00 主分类号 G11C29/00
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