发明名称 ONE-BIT FULL ADDER
摘要 FIELD: information technology. ^ SUBSTANCE: device has seven logic inverters, seven two-input AND logic elements, four three-input AND logic elements, four four-input AND logic elements, two three-input OR logic elements, one four-input OR logic element and one five-input OR logic element. ^ EFFECT: broader functional capabilities one the one-bit fill adder due to introduction of the modulo addition operation. ^ 1 dwg
申请公布号 RU2427027(C1) 申请公布日期 2011.08.20
申请号 RU20090146773 申请日期 2009.12.16
申请人 GOSUDARSTVENNOE OBRAZOVATEL'NOE UCHREZHDENIE VYSSHEGO PROFESSIONAL'NOGO OBRAZOVANIJA "STAVROPOL'SKIJ GOSUDARSTVENNYJ UNIVERSITET" 发明人 KOPYTOV VLADIMIR VJACHESLAVOVICH;PETRENKO VJACHESLAV IVANOVICH;SIDORCHUK ALESJA VJACHESLAVNA
分类号 G06F7/42 主分类号 G06F7/42
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