发明名称 DESIGN CONDITION CALCULATING DEVICE, OPTIMIZING METHOD FOR WARPAGE AND STRESS OF BOARD, AND OPTIMIZATION PROGRAM FOR WARPAGE AND STRESS OF BOARD
摘要 PROBLEM TO BE SOLVED: To calculate design condition, when an electronic component is to be solder-bonded to the surface of a printed board. SOLUTION: A design condition calculation device includes a data import section 21 for importing at least shape data and arranged data of the printed board and the electronic component sent from an input device 1; a model-generating section 22 for generating model data of the printed board, by adding material characteristic value to each of the data imported by the data import section 21; a warpage direction calculating section 23 for calculating the warpage direction of the printed board, based on the model data generated by the model generating section 22; a warpage stress calculating section 24 for calculating the warpage amount of the printed board and the stress of the solder bonded position, based on the model data generated by the model generating section 22; and an optimization section 25 for calculating designing conditions with which the balance between the warpage amount of the printed board calculated by the warpage calculating section 24 in the warpage direction of the printed board calculated by the warpage direction calculating section 23 and the stress of the solder bonded position can be maintained at an optimal balance. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011159870(A) 申请公布日期 2011.08.18
申请号 JP20100021417 申请日期 2010.02.02
申请人 NEC CORP 发明人 HIRATA ICHIRO
分类号 H05K3/34 主分类号 H05K3/34
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