发明名称 SEMICONDUCTOR MEMORY AND OPERATING METHOD THEREFOR
摘要 PROBLEM TO BE SOLVED: To prevent malfunction of a semiconductor memory and to improve read margin. SOLUTION: A memory cell includes a variable resistance element which stores data according to a resistance value that has a hysteresis characteristic with respect to an applied voltage. A negative resistor circuit is connected in parallel to the variable resistance element via a read node. In read operation, a voltage setting circuit tentatively sets, to the read node, an initial voltage corresponding to a read current smaller than a threshold current value for rewriting data. The read circuit decides data logic stored in the memory cell, based on the read voltage of the read node which varies with a current, flowing in the variable resistance element and the negative resistor circuit, according to the initial voltage. By setting the initial voltage so that the read voltage varies in the direction opposite to the loop variation of the hysteresis characteristic, data can be prevented from being rewritten by an inverted resistance value. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011159358(A) 申请公布日期 2011.08.18
申请号 JP20100021218 申请日期 2010.02.02
申请人 FUJITSU LTD 发明人 AOKI MASAKI
分类号 G11C11/15 主分类号 G11C11/15
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