| 摘要 |
PROBLEM TO BE SOLVED: To erase multichannel nonvolatile memories without interrupts of other operations with simple control, dispensing with consideration for exclusive control among a plurality of CPUs. SOLUTION: A semiconductor storage device having a plurality of CPUs and multichannel nonvolatile memories, is equipped with: a means for setting in an address queue (14) an address list of erase addresses of the multichannel nonvolatile memories; a command control part (18) for continuously generating a series of erase commands to the addresses on the address list in response to a single erase request generated from any CPU; and a distributor (24) for feeding the series of erase commands to the nonvolatile memories of the channels corresponding to the addresses. COPYRIGHT: (C)2011,JPO&INPIT
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