Memory control unit and memory control method and medium containing program for realizing the same

摘要

A transfer-target unit 11 outputs commands for data reading and data writing. An address generator 12 generates control signals in accordance with the commands, and outputs the number of bytes of data first transferred by read access. A command generator 13 generates control commands in accordance with the control signals to control SDRAM 15. At this time the command generator 13 judges the number of transferred bytes to control so that SDRAM 15 executes instructions in order from an instruction which is the most efficient in data transfer. That is, in the case where data is read across a bank boundary, the command generator 13 judges which is to be executed first between read processing in a bank 0 and active processing in a bank 1, to control SDRAM15. A data processor 14 mediates data transfer between the transfer-target unit 11 and SDRAM 15 in accordance with the control commands. In this way, it is possible to issue commands so as to terminate data transfer in the minimum number of cycles in the case where data read processing is continuously performed to different banks. The number of cycles required for two continuous access (access to the bank 0 and the bank 1) can be thus reduced, thereby increasing effective transfer rates of SDRAM 15.