| 摘要 |
In one embodiment, an authenticate module (12) includes: a memory module (121a) that a plurality of data elements of an input interleaved signal are written to and read from; and a memory access controller (121b) configured to write the data elements of the input interleaved signal to the memory module (121a) sequentially in accordance with address information in a specific writing order commonly set between different signal formats of interleaved signals, and read the data elements written to the memory module (121a) from the memory module (121a) sequentially in accordance with address information in a specific reading order commonly set between the different signal formats, and output the read data elements as a restore signal. |
