发明名称 Methods of forming integrated circuit devices having stacked gate electrodes
摘要 A method of forming a gate electrode of a semiconductor device is provided, the method including: forming a plurality of stacked structures each comprising a tunnel dielectric layer, a first silicon layer for floating gates, an intergate dielectric layer, a second silicon layer for control gates, and a mask pattern, on a semiconductor substrate in the stated order; forming a first interlayer dielectric layer between the plurality of stacked structures so that a top surface of the mask pattern is exposed; selectively removing the mask pattern of which the top surface is exposed; forming a third silicon layer in an area from which the hard disk layer was removed, and forming a silicon layer comprising the third silicon layer and the second silicon layer; recessing the first interlayer dielectric layer so that an upper portion of the silicon layer protrudes over the he first interlayer dielectric layer; and forming a metal silicide layer on the upper portion of the silicon layer.
申请公布号 US7998810(B2) 申请公布日期 2011.08.16
申请号 US20090424922 申请日期 2009.04.16
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM BYUNG-HEE;CHOI GIL-HEYUN;LEE SANG-WOO;LEE CHANG-WON;PARK JIN-HO;JUNG EUN-JI;LEE JEONG-GIL
分类号 H01L21/336 主分类号 H01L21/336
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