| 摘要 |
PROBLEM TO BE SOLVED: To implement an accurate scan test without a leakage even if clocks having shifted phases are used. SOLUTION: In a semiconductor integrated circuit, a plurality of flip-flop groups are supplied with first clocks CLK 1, 2, 3 corresponding to the flip-flop groups and including clocks having different active pulse phases, and a latch circuit is supplied with a second clock G1 for causing a latch to be active for a duration from an edge of an active pulse supplied at late timing in a clock cycle to an edge of an active pulse supplied at early timing in a next clock cycle among two active pulses supplied to the flip-flop groups connected to an input side and an output side of the latch circuit. COPYRIGHT: (C)2011,JPO&INPIT
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