| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce the time of an I/O compression test at low cost. <P>SOLUTION: A semiconductor device includes a plurality of chips to which a plurality of I/O terminals DQ0 to DQ31 are commonly connected via TSV. Each of the chips includes an I/O compression circuit which outputs one compression result (at least either one of nodes 01 to 04, 10) obtained by compression of data from each of a plurality of internal data buses to one first I/O terminal of the plurality of I/O terminals, and a control circuit including a register group setting the number of the one first I/O terminal. Setting information that makes the one first I/O terminal different for each chip is registered in the group of registers, so that each chip memory inputs or outputs data by using a different I/O terminal number for each chip, so that I/O compression tests by the I/O compression circuits can be performed concurrently in parallel in the plurality of chips without a bus fight. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
